A few days ago, at Huawei’s HarmonyOS 7 and Mate XT 2 launch event in Guangzhou, Huawei Executive Director Yu Chengdong officially unveiled the Kirin 9050 Pro processor, which debuts in the company’s second-generation tri-fold flagship, the Mate XT 2. The chip’s biggest highlight is that, under existing 7nm process conditions, Huawei used a “LogicFolding” 3D circuit layout technology derived from Tao’s Law, which it claims achieves simultaneous leaps in density and energy efficiency. Well-known Chinese tech media outlet Geekerwan has also just published its real-world test results for the Kirin 9050 Pro processor across various performance metrics, and the degree of improvement is indeed beyond expectations.
The Kirin 9050 Pro processor means a great deal to Huawei, because after the Kirin 9000 in the 2020 Mate 40 series, Huawei was long unable to obtain advanced-node foundry resources due to US sanctions, and its in-house design of high-end smartphone chips stalled for a time. Now the arrival of the Kirin 9050 Pro represents Huawei choosing a technology path different from “chasing process nodes”: under process constraints, it breaks through performance bottlenecks through innovations in packaging and circuit design.
Logic folding: boosting frequency without process scaling
To understand the progress of the Kirin 9050 Pro, you first need to look at what it does at the microscopic level. Traditional chip upgrades rely on process scaling: making transistors smaller allows more components to be packed into the same area, improving performance and energy efficiency at the same time. But when process advances stalled temporarily, Huawei chose another path: splitting circuits that were originally laid out on a single plane into two layers, top and bottom, so that the logic units of a single chip are arranged in layers.
This concept is similar to upgrading a “flat” to a “duplex” residence. The same footprint can accommodate more transistors. According to a paper Huawei presented at ISCAS 2026, under the same process node and the same 1.1V voltage, the big core frequency increased from 2.75GHz to 3.1GHz, an increase of nearly 13%. Conversely, if only the original frequency is needed, the voltage can be lowered further, and power consumption drops accordingly.
The video specifically explains why 3D layout can increase frequency: how fast a CPU can run depends on its slowest critical path. Data starts from one set of registers, goes through logic operations, and is then sent to the next set of registers; this process involves both computation and transmission. At 3 GHz, each cycle is only about 333 picoseconds, and if any segment is too slow, the frequency cannot go higher. Metal wires in a chip have resistance and capacitance, and signal transmission itself takes time. Huawei’s approach is to place circuits that communicate frequently closer together, turning routes that originally detoured far horizontally into short vertical connections, thereby reducing critical path delay.
The core innovation of the Kirin 9050 Pro is that, without changing the process node, it shortens routing distance through 3D circuit partitioning, thereby breaking through the frequency bottleneck. This is fundamentally different from AMD’s X3D (stacked cache) and Intel’s Foveros (connecting different functional chiplets): Huawei’s granularity is much finer, reaching down to the pipeline logic level inside the core and requiring extremely high connection density between the upper and lower layers. The bonding pitch shown in the paper has reached 1.5 microns.
Kirin 9050 Pro Processor Specs and Power Efficiency Benchmarks
The CPU in the Kirin 9050 Pro expands from the previous generation’s tri-cluster design to a quad-cluster design: 1 ultra-large core, 2 performance big cores, 4 efficiency big cores, and 2 ultra-low-power small cores. All big cores support hyper-threading, totaling 9 cores and 16 threads. The cache configuration is also quite ample: the ultra-large core has a huge exclusive L2 cache and shares L3 with the two performance big cores; the four efficiency big cores share another portion of L3; and the entire SoC also has 12MB of SLC cache. This generation’s CPU microarchitecture essentially follows the previous generation’s design, with only very minor tweaks. In other words, the energy-efficiency gains come almost entirely from logic folding, a new micro-layout approach.
The Geekerwan team ported a native SPEC CPU 2026 test to HarmonyOS. The results show that the prime core’s high-frequency energy efficiency in integer tests is already close to that of the Snapdragon 8 Gen 2’s X3 core, while its floating-point performance is stronger, with high-frequency energy efficiency even landing between the Snapdragon 8 Gen 2’s X3 and the Snapdragon 8 Gen 3’s X4. At the same 2.75 GHz frequency, the Kirin 9050 Pro prime core’s power consumption is more than 30% lower than the previous generation, while at a 3.1 GHz peak frequency, without a significant increase in power consumption, performance is again a notch higher than the previous generation’s 2.75 GHz.
In multi-core terms, the native HarmonyOS version scored 1,813 single-core and 8,159 multi-core on GeekBench 7. Its multi-core energy efficiency is almost on par with the MediaTek Dimensity 9400, a fairly significant improvement over the previous generation.
A 30% reduction in power consumption at the same frequency is a very substantial improvement, indicating that logic folding technology has indeed effectively shortened critical path delay. Huawei’s choice of 3.1GHz as the peak frequency rather than a more extreme figure also reflects a pragmatic design philosophy. The efficiency curves of the Kirin 9050 Pro and Dimensity 9400 in the high-frequency range have almost flattened out, trading a large amount of power consumption for very little performance gain, while 3.1GHz is still at a point on the efficiency curve with a certain slope, meaning the upper limit of this technical approach may not yet have been reached.
GPU and NPU: A Comprehensive Leap Forward
On the GPU side, the new chip features a Mali 955, retaining the base 6 CU configuration, but with a significantly increased ALU count and higher clock speeds. FP32 throughput has jumped from 1.4 TFLOPS in the previous generation to 2.2 TFLOPS. In 3DMark Steel Nomad Light, it scores over 1,370, nearly 40% higher than the previous generation’s score of under 1,000, and its peak performance is nearly 3x that of the 2024 Kirin 9020. In terms of GPU power efficiency, mid-to-high frequencies are already close to the Dimensity 9200 level, while mid-to-low frequencies fall between Snapdragon 8 Gen 2 and 8 Gen 3.
The NPU has made even more impressive progress. The Kirin 9050 Pro is equipped with a next-generation Da Vinci architecture NPU. In an INT8-based convolutional neural network test, it measured 67.7 TOPS of compute, with a theoretical peak of 70 TOPS—a 150% increase over the previous generation’s 29 TOPS theoretical compute. This NPU also achieved the industry’s first on-device deployment of a 30B MoE (mixture of experts) full-modality large model, with 30 billion total parameters and 2 billion active parameters. It is used for HarmonyOS 7’s Xiaoyi AI features, such as organizing photo albums offline and accessibility adaptation implemented via an on-device vision model.
The NPU jumping from 29 TOPS to 70 TOPS, a 150% increase, is the most eye-catching figure in this chip. The deployment of an on-device 30B MoE model means Huawei is no longer inferior to any flagship SoC vendor in AI inference capability. Combined with Huawei’s integration advantages in its software ecosystem (HarmonyOS + Celia AI), the NPU’s real-world experience may be more competitive than the benchmark numbers suggest.
Real-world gaming test: Benchmarked against Snapdragon 8 Elite
Because the Mate XT 2 is a tri-fold model with limited cooling space, the video compares it with the Samsung Galaxy Z Trifold—another tri-fold, equipped with Snapdragon 8 Elite—rather than a standard flagship.
In the Genshin Impact test, the resolution of Huawei’s two models was far higher than Samsung’s. Even under such unfavorable conditions, the Mate XT 2 still ran at a full frame rate throughout, and its 1% low frame rate was even higher than that of the Samsung, whose resolution was much lower. In the more demanding Ananta, the three devices ran at similar resolutions. The Mate XT 2’s average frame rate performance matched or even slightly surpassed that of the Samsung Trifold equipped with Snapdragon 8 Elite, and was nearly double that of the previous-generation Mate XTs. In the new map test for Wuthering Waves, the two devices’ gaming performance was still roughly comparable.
Test results from three games show that the gaming performance of the Kirin 9050 Pro has at least reached the tier of the Snapdragon 8 Elite. Achieving this level on a tri-fold model with extremely limited cooling conditions means that if a candybar phone powered by this chip comes out in the future, its gaming performance will surely be even more impressive.
Summary: Same craftsmanship, fully evolved.
Overall, despite essentially no changes in architecture or process, the Kirin 9050 Pro delivers significant improvements across all three major cores: CPU, GPU, and NPU. Official data shows that the Mate XT 2 equipped with the Kirin 9050 Pro offers 42% higher overall performance than the previous-generation Mate XTs. A Digitimes analysis points out that logic folding technology delivered a 55% increase in transistor density and a 66% reduction in NPU power consumption.
At the end of the video, it notes that after integrating its in-house chips, system, and software, Huawei can fully deliver an experience on par with other contemporary flagships, or even smoother, and that Benchmark scores cannot fully reflect the real-world user experience of these two generations of Huawei flagships. At a time when progress in advanced process nodes is slowing, this “logic folding” route Huawei has chosen may one day become a common direction for the entire industry. Those interested can check out this excellent analysis video from Geekerwan.
The Mate XT 2 is now on sale in the Chinese market. The 16GB+256GB version is priced at RMB 19,999 (approximately NT$88,000), while the 16GB+1TB Lingdun privacy-screen edition is priced at RMB 24,999 (approximately NT$110,000). If a bar-type flagship equipped with the Kirin 9050 Pro, such as the Mate 90 series, is launched in the future, there will be an opportunity for this chip’s full potential to be more fully unleashed.
Source: KOCPC Chinese