As the generative AI computing power race intensifies today, HBM (High Bandwidth Memory) specification upgrades have always been viewed as a key solution to extending Moore’s Law. However, renowned industry analyst Ming-Chi Kuo’s recent technical observations on AI serverspoint outThe so-called “memory bottleneck” (Memory-bound), or the “memory wall” as it’s commonly referred to in the industry, is no longer merely a simple hardware bandwidth competition. As the quality of AI inference and the demand for long context increase, the currently dominant Transformer + Attention architecture must read massive KV Cache before generating each token. This technical characteristic causes memory read pressure to scale geometrically with conversation length, becoming a key bottleneck for computational growth. Although no other architecture has yet emerged to replace Transformer, industry giants like NVIDIA, Google, and Anthropic are tackling this performance crisis caused by the memory bottleneck from system-level, algorithmic-level, and application-level perspectives respectively.
1. NVIDIA’s System-Level Breakthrough: LPX’s “Decoupling” Strategy
While the market’s focus remains on NVIDIA’s upcoming next-generation rack solution, the Vera Rubin NVL72, which offers a significant 2.75x improvement in memory bandwidth compared to its predecessor, the GB300 NVL72, NVIDIA simultaneously unveiled Groq 3 LPX(Low-Power Xpander) reveals a different problem-solving approach.
1. Business Drivers for Stable Output
NVIDIA’s core business objective is to provide stable, low-latency token output. During AI inference, HBM access instability often disrupts the scheduling of the GPU’s internal FFN (Feed-Forward Network), leading to output “speeds up and slows down” (Jitter) or extreme latency (Tail Latency) issues. For enterprise customers, stable low-latency output directly impacts the average selling price (ASP) of tokens.
2. SRAM and HBM: Role Distribution
NVIDIA’s LPX solution is essentially a “decoupling” of compute and memory resources. Its operational mechanism is as follows:
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LPX （SRAM）Responsible for processing FFN computation tasks. Since SRAM offers extremely low latency, it can ensure stable FFN access.
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GPU （HBM）Continues to handle Attention and KV Cache access.
By moving FFN off the GPU, NVIDIA successfully reduced resource contention when different KV Cache requests are read. This approach doesn’t “solve” the memory bandwidth shortage problem, but rather enhances the overall commercial value of the system by improving output stability. This also demonstrates that even with powerful hardware specs like Vera Rubin, NVIDIA still needs to optimize performance through system-level design.
II. Google’s Algorithm Revolution: TurboQuant’s KV Compression Technique
As the cloud giant with the world’s largest computing infrastructure, Google’s core strategy has always been centered on “maximizing infrastructure utilization.” In response to the ever-expanding KV Cache, Google proposed a system called TurboQuant the algorithm
Reduce costs and increase output
Google’s goal is to reduce the cost per inference and maximize revenue. By compressing the KV Cache capacity, the amount of data required per read decreases, directly alleviating the read burden in long-text scenarios. TurboQuant’s fixed quantization scheme requires no additional calibration, making it highly suitable for large-scale deployment in cloud environments.
2. How Compression Complements Hardware Specifications
While algorithms continue to improve efficiency, Google has not stopped expanding its hardware. According to industry predictions, future new TPU’s HBM capacity will increase from the current v7 192GB to 384GB in the second half of 2027 from MediaTek, and to 512GB in 2028 from Broadcom.
This data shows that even though algorithms can effectively compress data, Google remains aggressively pushing hardware specs. This reflects that compression algorithms and memory upgrades are complementary: compression allows each GB of HBM to generate more tokens, creating a multiplier effect rather than replacing the demand for hardware.
3. Anthropic’s Application Layer Management: Memory Control in the Agent Era
As the pioneer of AI agents, Anthropic’s approach to handling memory bottlenecks is more “human-like,” with emphasis on controlling how memories are retained and used—a strategy reinforced by the recent code leak incident.
A three-in-one memory management mechanism
To support an agent architecture with persistent memory capabilities, Anthropic developed a sophisticated management framework:
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Selectionthrough
MEMORY.mdThe index identifies relevant content, loading only necessary Topic or Project Memory files to prevent invalid data from consuming read space. -
CompressionApply “Context Collapse” processing to loaded content, continuously reducing the information volume.
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RefinementConvert historical conversations into high-density query records, through
autoDreamorganize and streamline these mechanisms to enhance information density
Software-Defined Memory
For Anthropic, reducing the expansion rate of KV Cache and minimizing read demands are key to improving inference efficiency and reducing latency. This demonstrates that even with abundant computing power at the hardware level, AI Agents still struggle to handle long-duration, high-intensity operational tasks without application-level memory management mechanisms.
Conclusion: Cross-level systemic confrontation
Looking at the strategies of the three major players, we can distill three key technical truths about the “memory bottleneck”:
First,Solutions are driven by business objectivesNVIDIA pursues output value, Google pursues cost efficiency, and Anthropic pursues agent persistence. Different business orientations lead them to tackle problems at different levels—there is no single “correct answer.”
Secondly,Hardware upgrades aren’t a cure-allEven as HBM specifications continue to double, the KV Cache bloat issue in Transformer architectures remains unresolved. This illustrates that the memory bottleneck is not a flaw of any single component, but rather a systemic challenge spanning hardware, algorithms, and application software.
Finally,Various plans complement each otherThere is a common oversimplified logic in the market that believes once algorithm compression technology matures, the demand for memory will disappear. However, looking at Google’s TPU trajectory and NVIDIA’s LPX development, the reality is the opposite: the more advanced the technology, the more it needs to simultaneously and continuously alleviate bottlenecks at different levels in order to support the next wave of explosive AI compute growth.
Source: KOCPC Chinese